diff --git a/Makefile b/Makefile
index cc2cf081..43b3a653 100644
--- a/Makefile
+++ b/Makefile
@@ -44,7 +44,7 @@ PRINT := printf
ASM_PROCESSOR_DIR := tools/asm-processor
BK_ROM_COMPRESS := tools/bk_rom_compressor/target/release/bk_rom_compress
BK_ROM_DECOMPRESS := tools/bk_rom_compressor/target/release/bk_rom_decompress
-BK_ASSET_TOOL := tools/bk_asset_tool/bk_asset_tool
+BK_ASSET_TOOL := tools/bk_asset_tool/target/release/bk_asset_tool
ASM_PROCESSOR := $(PYTHON) $(ASM_PROCESSOR_DIR)/asm_processor.py
SPLAT_INPUTS := $(PYTHON) tools/splat_inputs.py
PROGRESS := $(PYTHON) tools/progress.py
@@ -166,7 +166,7 @@ OPT_FLAGS := -O2
MIPSBIT := -mips2
ASFLAGS := -EB -mtune=vr4300 -march=vr4300 -mabi=32 -I include
GCC_ASFLAGS := -c -x assembler-with-cpp -mabi=32 -ffreestanding -mtune=vr4300 -march=vr4300 -mfix4300 -G 0 -O -mno-shared -fno-PIC -mno-abicalls
-LDFLAGS := -T $(LD_SCRIPT) -Map $(ELF:.elf=.map) --no-check-sections --accept-unknown-input-arch -T undefined_syms.libultra.txt
+LDFLAGS := -T $(LD_SCRIPT) -Map $(ELF:.elf=.map) --no-check-sections --accept-unknown-input-arch -T manual_syms.txt
BINOFLAGS := -I binary -O elf32-tradbigmips
### Rules ###
@@ -316,7 +316,7 @@ $(DECOMPRESSED_BASEROM): $(BASEROM) $(BK_ROM_DECOMPRESS)
# .o -> .elf (dummy symbols)
$(PRELIM_ELF): $(ALL_OBJS) $(LD_SCRIPT) $(ASSET_OBJS)
$(call print1,Linking elf:,$@)
- @$(LD) $(LDFLAGS) -T undefined_syms_auto.$(VERSION).txt -T undefined_syms.$(VERSION).txt -T rzip_dummy_addrs.txt -o $@
+ @$(LD) $(LDFLAGS) -T rzip_dummy_addrs.txt -o $@
# .elf -> .z64 (dummy symbols)
$(PRELIM_Z64) : $(PRELIM_ELF)
@@ -330,7 +330,7 @@ $(COMPRESSED_SYMBOLS): $(PRELIM_ELF) $(PRELIM_Z64) $(BK_ROM_COMPRESS)
# .o -> .elf (game)
$(ELF): $(ALL_OBJS) $(LD_SCRIPT) $(ASSET_OBJS) $(COMPRESSED_SYMBOLS)
$(call print1,Linking elf:,$@)
- @$(LD) $(LDFLAGS) -T undefined_syms_auto.$(VERSION).txt -T undefined_syms.$(VERSION).txt -T $(COMPRESSED_SYMBOLS) -o $@
+ @$(LD) $(LDFLAGS) -T $(COMPRESSED_SYMBOLS) -o $@
# .elf -> .z64 (uncompressed)
$(UNCOMPRESSED_Z64) : $(ELF)
@@ -341,15 +341,18 @@ $(UNCOMPRESSED_Z64) : $(ELF)
$(FINAL_Z64) : $(UNCOMPRESSED_Z64) $(ELF) $(BK_ROM_COMPRESS)
@$(BK_ROM_COMPRESS) $(ELF) $(UNCOMPRESSED_Z64) $@
+# TOOLS
+# Tool for spliting BK asset sections into and from ROM Bin and transforming certain file types
$(BK_ASSET_TOOL):
- @$(CD) tools/bk_asset_tool && cargo build --release
- @$(CP) tools/bk_asset_tool/target/release/bk_asset_tool $@
+ @$(CD) tools/bk_asset_tool && cargo build --release 2> /dev/null
+# Tool to compress BK and correct checksums from elf and uncompressed rom
$(BK_ROM_COMPRESS):
- @$(CD) tools/bk_rom_compressor && cargo build --release --bin bk_rom_compress
+ @$(CD) tools/bk_rom_compressor && cargo build --release --bin bk_rom_compress 2> /dev/null
+# Tool to turn compressed BK into uncompressed ROM
$(BK_ROM_DECOMPRESS):
- @$(CD) tools/bk_rom_compressor && cargo build --release --bin bk_rom_decompress
+ @$(CD) tools/bk_rom_compressor && cargo build --release --bin bk_rom_decompress 2> /dev/null
clean:
$(call print0,Cleaning build artifacts)
@@ -361,7 +364,6 @@ clean:
@$(RM) -rf $(addprefix $(ASM_ROOT)/,$(filter-out core1,$(OVERLAYS)))
@$(RM) -rf $(ASM_ROOT)/core1/*.s
@$(RM) -rf $(ASM_ROOT)/core1/os
- @$(RM) -f undefined_syms_auto* undefined_funcs_auto*
@$(RM) -f *.ld
# Per-file flag definitions
@@ -415,7 +417,9 @@ MAKEFLAGS += -r
.SUFFIXES:
# Phony targets
-.PHONY: all clean verify $(OVERLAYS) progress $(addprefix progress-,$(OVERLAYS))
+.PHONY: all clean verify $(OVERLAYS) progress $(addprefix progress-,$(OVERLAYS)) \
+ $(BK_ASSET_TOOL) $(BK_ROM_COMPRESS) $(BK_ROM_DECOMPRESS)
+
# Set up pipefail
SHELL = /bin/bash -e -o pipefail
diff --git a/README.md b/README.md
index d70b2bc6..9ae98068 100644
--- a/README.md
+++ b/README.md
@@ -1,4 +1,4 @@
-# banjo (99.6748%)
+# banjo (100.0000%)
@@ -19,16 +19,6 @@
-
-
-## Remaining Functions
-These all are the remaining NTSC-USA V1.0 function left to be matched.
-Be sure to check scratch "family" for any progress that may not be reflected here
-
-| File | Function | Scratch Link | % | Notes |
-| ------------------ | --------------- | ---------------------------------------- | ------ | ----- |
-| core2/code_12F30.c | func_80299EC0 | [Ar62G](https://decomp.me/scratch/Ar62G) | 77.65% |
-| core2/code_B9770.c | func_80340BE4 | [FXyYS](https://decomp.me/scratch/FXyYS) | 65.91% | spline function
-| core2/code_B9770.c | func_803411B0 | [rHkDu](https://decomp.me/scratch/rHkDu) | 87.70% | spline function
-
## Building
Grab tools
diff --git a/asm/core1/ultra/exceptasm.s b/asm/core1/ultra/exceptasm.s
index 6620a849..6048455b 100644
--- a/asm/core1/ultra/exceptasm.s
+++ b/asm/core1/ultra/exceptasm.s
@@ -1,4 +1,5 @@
#include
+#include
.include "macro.inc"
/* assembler directives */
@@ -59,6 +60,8 @@ __osIntTable:
.section .text, "ax"
+/* Generated by spimdisasm 1.24.3 */
+
# Handwritten function
glabel func_8026A2E0
/* F45B10 8026A2E0 3C1A8027 */ lui $k0, %hi(D_8026A300)
@@ -141,8 +144,8 @@ D_8026A300:
/* F45C40 8026A410 0369D825 */ or $k1, $k1, $t1
/* F45C44 8026A414 AF5B0118 */ sw $k1, 0x118($k0)
.L8026A418:
-/* F45C48 8026A418 3C09A430 */ lui $t1, %hi(D_A430000C)
-/* F45C4C 8026A41C 8D29000C */ lw $t1, %lo(D_A430000C)($t1)
+/* F45C48 8026A418 3C09A430 */ lui $t1, %hi(PHYS_TO_K1(MI_INTR_MASK_REG))
+/* F45C4C 8026A41C 8D29000C */ lw $t1, %lo(PHYS_TO_K1(MI_INTR_MASK_REG))($t1)
/* F45C50 8026A420 5120000C */ beql $t1, $zero, .L8026A454
/* F45C54 8026A424 AF490128 */ sw $t1, 0x128($k0)
/* F45C58 8026A428 3C088027 */ lui $t0, %hi(__OSGlobalIntMask)
@@ -258,21 +261,21 @@ rcp:
/* F45DE4 8026A5B4 3C088027 */ lui $t0, %hi(__OSGlobalIntMask)
/* F45DE8 8026A5B8 25087130 */ addiu $t0, $t0, %lo(__OSGlobalIntMask)
/* F45DEC 8026A5BC 8D080000 */ lw $t0, 0x0($t0)
-/* F45DF0 8026A5C0 3C11A430 */ lui $s1, %hi(D_A4300008)
-/* F45DF4 8026A5C4 8E310008 */ lw $s1, %lo(D_A4300008)($s1)
+/* F45DF0 8026A5C0 3C11A430 */ lui $s1, %hi(PHYS_TO_K1(MI_INTR_REG))
+/* F45DF4 8026A5C4 8E310008 */ lw $s1, %lo(PHYS_TO_K1(MI_INTR_REG))($s1)
/* F45DF8 8026A5C8 00084402 */ srl $t0, $t0, 16
/* F45DFC 8026A5CC 02288824 */ and $s1, $s1, $t0
/* F45E00 8026A5D0 32290001 */ andi $t1, $s1, 0x1
/* F45E04 8026A5D4 51200014 */ beql $t1, $zero, .L8026A628
/* F45E08 8026A5D8 32290008 */ andi $t1, $s1, 0x8
-/* F45E0C 8026A5DC 3C0CA404 */ lui $t4, %hi(D_A4040010)
-/* F45E10 8026A5E0 8D8C0010 */ lw $t4, %lo(D_A4040010)($t4)
+/* F45E0C 8026A5DC 3C0CA404 */ lui $t4, %hi(PHYS_TO_K1(SP_STATUS_REG))
+/* F45E10 8026A5E0 8D8C0010 */ lw $t4, %lo(PHYS_TO_K1(SP_STATUS_REG))($t4)
/* F45E14 8026A5E4 24090008 */ addiu $t1, $zero, 0x8
-/* F45E18 8026A5E8 3C01A404 */ lui $at, %hi(D_A4040010)
+/* F45E18 8026A5E8 3C01A404 */ lui $at, %hi(PHYS_TO_K1(SP_STATUS_REG))
/* F45E1C 8026A5EC 318C0300 */ andi $t4, $t4, 0x300
/* F45E20 8026A5F0 3231003E */ andi $s1, $s1, 0x3E
/* F45E24 8026A5F4 11800007 */ beqz $t4, .L8026A614
-/* F45E28 8026A5F8 AC290010 */ sw $t1, %lo(D_A4040010)($at)
+/* F45E28 8026A5F8 AC290010 */ sw $t1, %lo(PHYS_TO_K1(SP_STATUS_REG))($at)
/* F45E2C 8026A5FC 0C09AA09 */ jal func_8026A824
/* F45E30 8026A600 24040020 */ addiu $a0, $zero, 0x20
/* F45E34 8026A604 52200039 */ beql $s1, $zero, .L8026A6EC
@@ -287,9 +290,9 @@ rcp:
/* F45E54 8026A624 32290008 */ andi $t1, $s1, 0x8
.L8026A628:
/* F45E58 8026A628 11200007 */ beqz $t1, .L8026A648
-/* F45E5C 8026A62C 3C01A440 */ lui $at, %hi(D_A4400010)
+/* F45E5C 8026A62C 3C01A440 */ lui $at, %hi(PHYS_TO_K1(VI_CURRENT_REG))
/* F45E60 8026A630 32310037 */ andi $s1, $s1, 0x37
-/* F45E64 8026A634 AC200010 */ sw $zero, %lo(D_A4400010)($at)
+/* F45E64 8026A634 AC200010 */ sw $zero, %lo(PHYS_TO_K1(VI_CURRENT_REG))($at)
/* F45E68 8026A638 0C09AA09 */ jal func_8026A824
/* F45E6C 8026A63C 24040038 */ addiu $a0, $zero, 0x38
/* F45E70 8026A640 5220002A */ beql $s1, $zero, .L8026A6EC
@@ -299,9 +302,9 @@ rcp:
/* F45E7C 8026A64C 5120000A */ beql $t1, $zero, .L8026A678
/* F45E80 8026A650 32290002 */ andi $t1, $s1, 0x2
/* F45E84 8026A654 24090001 */ addiu $t1, $zero, 0x1
-/* F45E88 8026A658 3C01A450 */ lui $at, %hi(D_A450000C)
+/* F45E88 8026A658 3C01A450 */ lui $at, %hi(PHYS_TO_K1(AI_STATUS_REG))
/* F45E8C 8026A65C 3231003B */ andi $s1, $s1, 0x3B
-/* F45E90 8026A660 AC29000C */ sw $t1, %lo(D_A450000C)($at)
+/* F45E90 8026A660 AC29000C */ sw $t1, %lo(PHYS_TO_K1(AI_STATUS_REG))($at)
/* F45E94 8026A664 0C09AA09 */ jal func_8026A824
/* F45E98 8026A668 24040030 */ addiu $a0, $zero, 0x30
/* F45E9C 8026A66C 5220001F */ beql $s1, $zero, .L8026A6EC
@@ -309,9 +312,9 @@ rcp:
/* F45EA4 8026A674 32290002 */ andi $t1, $s1, 0x2
.L8026A678:
/* F45EA8 8026A678 11200007 */ beqz $t1, .L8026A698
-/* F45EAC 8026A67C 3C01A480 */ lui $at, %hi(D_A4800018)
+/* F45EAC 8026A67C 3C01A480 */ lui $at, %hi(PHYS_TO_K1(SI_STATUS_REG))
/* F45EB0 8026A680 3231003D */ andi $s1, $s1, 0x3D
-/* F45EB4 8026A684 AC200018 */ sw $zero, %lo(D_A4800018)($at)
+/* F45EB4 8026A684 AC200018 */ sw $zero, %lo(PHYS_TO_K1(SI_STATUS_REG))($at)
/* F45EB8 8026A688 0C09AA09 */ jal func_8026A824
/* F45EBC 8026A68C 24040028 */ addiu $a0, $zero, 0x28
/* F45EC0 8026A690 52200016 */ beql $s1, $zero, .L8026A6EC
@@ -321,9 +324,9 @@ rcp:
/* F45ECC 8026A69C 5120000A */ beql $t1, $zero, .L8026A6C8
/* F45ED0 8026A6A0 32290020 */ andi $t1, $s1, 0x20
/* F45ED4 8026A6A4 24090002 */ addiu $t1, $zero, 0x2
-/* F45ED8 8026A6A8 3C01A460 */ lui $at, %hi(D_A4600010)
+/* F45ED8 8026A6A8 3C01A460 */ lui $at, %hi(PHYS_TO_K1(PI_STATUS_REG))
/* F45EDC 8026A6AC 3231002F */ andi $s1, $s1, 0x2F
-/* F45EE0 8026A6B0 AC290010 */ sw $t1, %lo(D_A4600010)($at)
+/* F45EE0 8026A6B0 AC290010 */ sw $t1, %lo(PHYS_TO_K1(PI_STATUS_REG))($at)
/* F45EE4 8026A6B4 0C09AA09 */ jal func_8026A824
/* F45EE8 8026A6B8 24040040 */ addiu $a0, $zero, 0x40
/* F45EEC 8026A6BC 5220000B */ beql $s1, $zero, .L8026A6EC
@@ -333,9 +336,9 @@ rcp:
/* F45EF8 8026A6C8 51200008 */ beql $t1, $zero, .L8026A6EC
/* F45EFC 8026A6CC 2401FBFF */ addiu $at, $zero, -0x401
/* F45F00 8026A6D0 24090800 */ addiu $t1, $zero, 0x800
-/* F45F04 8026A6D4 3C01A430 */ lui $at, %hi(D_A4300000)
+/* F45F04 8026A6D4 3C01A430 */ lui $at, %hi(PHYS_TO_K1(MI_MODE_REG))
/* F45F08 8026A6D8 3231001F */ andi $s1, $s1, 0x1F
-/* F45F0C 8026A6DC AC290000 */ sw $t1, %lo(D_A4300000)($at)
+/* F45F0C 8026A6DC AC290000 */ sw $t1, %lo(PHYS_TO_K1(MI_MODE_REG))($at)
/* F45F10 8026A6E0 0C09AA09 */ jal func_8026A824
/* F45F14 8026A6E4 24040048 */ addiu $a0, $zero, 0x48
/* F45F18 8026A6E8 2401FBFF */ addiu $at, $zero, -0x401
@@ -427,6 +430,7 @@ enqueueRunning:
/* F4604C 8026A81C 0809AA99 */ j __osDispatchThread
/* F46050 8026A820 00000000 */ nop
endlabel func_8026A2E0
+.size func_8026A2E0, . - func_8026A2E0
# Handwritten function
glabel func_8026A824
@@ -493,6 +497,7 @@ glabel func_8026A824
/* F46134 8026A904 1000FFB5 */ b enqueueRunning
/* F46138 8026A908 AF5B0118 */ sw $k1, 0x118($k0)
endlabel func_8026A824
+.size func_8026A824, . - func_8026A824
# Handwritten function
glabel __osEnqueueAndYield
@@ -528,7 +533,7 @@ glabel __osEnqueueAndYield
/* F461AC 8026A97C 8CBB0118 */ lw $k1, 0x118($a1)
/* F461B0 8026A980 3369FF00 */ andi $t1, $k1, 0xFF00
/* F461B4 8026A984 5120000E */ beql $t1, $zero, .L8026A9C0
-/* F461B8 8026A988 3C1BA430 */ lui $k1, %hi(D_A430000C)
+/* F461B8 8026A988 3C1BA430 */ lui $k1, %hi(PHYS_TO_K1(MI_INTR_MASK_REG))
/* F461BC 8026A98C 3C088027 */ lui $t0, %hi(__OSGlobalIntMask)
/* F461C0 8026A990 25087130 */ addiu $t0, $t0, %lo(__OSGlobalIntMask)
/* F461C4 8026A994 8D080000 */ lw $t0, 0x0($t0)
@@ -541,9 +546,9 @@ glabel __osEnqueueAndYield
/* F461E0 8026A9B0 0361D824 */ and $k1, $k1, $at
/* F461E4 8026A9B4 0369D825 */ or $k1, $k1, $t1
/* F461E8 8026A9B8 ACBB0118 */ sw $k1, 0x118($a1)
-/* F461EC 8026A9BC 3C1BA430 */ lui $k1, %hi(D_A430000C)
+/* F461EC 8026A9BC 3C1BA430 */ lui $k1, %hi(PHYS_TO_K1(MI_INTR_MASK_REG))
.L8026A9C0:
-/* F461F0 8026A9C0 8F7B000C */ lw $k1, %lo(D_A430000C)($k1)
+/* F461F0 8026A9C0 8F7B000C */ lw $k1, %lo(PHYS_TO_K1(MI_INTR_MASK_REG))($k1)
/* F461F4 8026A9C4 1360000B */ beqz $k1, .L8026A9F4
/* F461F8 8026A9C8 00000000 */ nop
/* F461FC 8026A9CC 3C1A8027 */ lui $k0, %hi(__OSGlobalIntMask)
@@ -565,6 +570,7 @@ glabel __osEnqueueAndYield
/* F46234 8026AA04 0809AA99 */ j __osDispatchThread
/* F46238 8026AA08 00000000 */ nop
endlabel __osEnqueueAndYield
+.size __osEnqueueAndYield, . - __osEnqueueAndYield
glabel __osEnqueueThread
/* F4623C 8026AA0C 8C980000 */ lw $t8, 0x0($a0)
@@ -588,6 +594,7 @@ glabel __osEnqueueThread
/* F4627C 8026AA4C 03E00008 */ jr $ra
/* F46280 8026AA50 ACA40008 */ sw $a0, 0x8($a1)
endlabel __osEnqueueThread
+.size __osEnqueueThread, . - __osEnqueueThread
glabel __osPopThread
/* F46284 8026AA54 8C820000 */ lw $v0, 0x0($a0)
@@ -595,6 +602,7 @@ glabel __osPopThread
/* F4628C 8026AA5C 03E00008 */ jr $ra
/* F46290 8026AA60 AC990000 */ sw $t9, 0x0($a0)
endlabel __osPopThread
+.size __osPopThread, . - __osPopThread
# Handwritten function
glabel __osDispatchThread
@@ -686,8 +694,8 @@ glabel __osDispatchThread
/* F463E4 8026ABB4 275A8C60 */ addiu $k0, $k0, %lo(__osRcpImTable)
/* F463E8 8026ABB8 037AD821 */ addu $k1, $k1, $k0
/* F463EC 8026ABBC 977B0000 */ lhu $k1, 0x0($k1)
-/* F463F0 8026ABC0 3C1AA430 */ lui $k0, %hi(D_A430000C)
-/* F463F4 8026ABC4 275A000C */ addiu $k0, $k0, %lo(D_A430000C)
+/* F463F0 8026ABC0 3C1AA430 */ lui $k0, %hi(PHYS_TO_K1(MI_INTR_MASK_REG))
+/* F463F4 8026ABC4 275A000C */ addiu $k0, $k0, %lo(PHYS_TO_K1(MI_INTR_MASK_REG))
/* F463F8 8026ABC8 AF5B0000 */ sw $k1, 0x0($k0)
/* F463FC 8026ABCC 00000000 */ nop
/* F46400 8026ABD0 00000000 */ nop
@@ -695,6 +703,7 @@ glabel __osDispatchThread
/* F46408 8026ABD8 00000000 */ nop
/* F4640C 8026ABDC 42000018 */ eret
endlabel __osDispatchThread
+.size __osDispatchThread, . - __osDispatchThread
glabel __osCleanupThread
/* F46410 8026ABE0 0C09936C */ jal osDestroyThread
@@ -702,6 +711,7 @@ glabel __osCleanupThread
/* F46418 8026ABE8 00000000 */ nop
/* F4641C 8026ABEC 00000000 */ nop
endlabel __osCleanupThread
+.size __osCleanupThread, . - __osCleanupThread
# Handwritten function
glabel osMapTLBRdb
@@ -730,3 +740,4 @@ glabel osMapTLBRdb
/* F46478 8026AC48 00000000 */ nop
/* F4647C 8026AC4C 00000000 */ nop
endlabel osMapTLBRdb
+.size osMapTLBRdb, . - osMapTLBRdb
diff --git a/asm/core1/ultra/parameters.s b/asm/core1/ultra/parameters.s
new file mode 100644
index 00000000..450af31b
--- /dev/null
+++ b/asm/core1/ultra/parameters.s
@@ -0,0 +1,17 @@
+#include "PR/R4300.h"
+#include "sys/asm.h"
+#include "sys/regdef.h"
+
+.text
+ABS(leoBootID, 0x800001a0)
+ABS(osTvType, 0x80000300)
+ABS(osRomType, 0x80000304)
+ABS(osRomBase, 0x80000308)
+ABS(osResetType, 0x8000030c)
+ABS(osCicId, 0x80000310)
+ABS(osVersion, 0x80000314)
+ABS(osMemSize, 0x80000318)
+ABS(osAppNMIBuffer, 0x8000031c)
+
+.space 0x60
+/* padded to 0x60 in the object file */
diff --git a/asm/core1/ultra/setintmask.s b/asm/core1/ultra/setintmask.s
index a561e22f..a5cf9f88 100644
--- a/asm/core1/ultra/setintmask.s
+++ b/asm/core1/ultra/setintmask.s
@@ -1,4 +1,5 @@
#include
+#include
.include "macro.inc"
# assembler directives
.set noat # allow manual use of $at
@@ -100,8 +101,8 @@ glabel osSetIntMask
xor $t0, $t3, $at
andi $t0, $t0, 0xff00
or $v0, $v0, $t0
- lui $t2, %hi(D_A430000C)
- lw $t2, %lo(D_A430000C)($t2)
+ lui $t2, %hi(PHYS_TO_K1(MI_INTR_MASK_REG))
+ lw $t2, %lo(PHYS_TO_K1(MI_INTR_MASK_REG))($t2)
beqz $t2, setintmask_1
srl $t1, $t3, 0x10
addiu $at, $zero, -1
@@ -118,8 +119,8 @@ setintmask_1:
lui $t2, %hi(__osRcpImTable)
addu $t2, $t2, $t0
lhu $t2, %lo(__osRcpImTable)($t2)
- lui $at, %hi(D_A430000C)
- sw $t2, %lo(D_A430000C)($at)
+ lui $at, %hi(PHYS_TO_K1(MI_INTR_MASK_REG))
+ sw $t2, %lo(PHYS_TO_K1(MI_INTR_MASK_REG))($at)
andi $t0, $a0, 0xff01
andi $t1, $t3, 0xff00
and $t0, $t0, $t1
diff --git a/asm/data/fight/code_180.data.s b/asm/data/fight/code_180.data.s
deleted file mode 100644
index d589d122..00000000
--- a/asm/data/fight/code_180.data.s
+++ /dev/null
@@ -1,429 +0,0 @@
-.include "macro.inc"
-
-.section .data
-
-dlabel D_80392100
-.double -500.0
-
-dlabel jtbl_80392108
-.word L80387794_13A4, L803877F8_1408, L803878FC_150C, L803879A0_15B0, L80387A20_1630, L80387A98_16A8
-
-dlabel D_80392120
-.float 0.95
-
-dlabel D_80392124
-.float 1.05
-
-dlabel D_80392128
-.float 5000.0
-
-dlabel D_8039212C
-.float 12000.0
-
-dlabel D_80392130
-.float 1e8
-
-dlabel jtbl_80392134
-.word L80388254_1E64, L80388558_2168, L80388558_2168, L80388268_1E78, L80388314_1F24, L8038837C_1F8C, L80388420_2030, L80388468_2078, L80388484_2094, L80388558_2168, L803884CC_20DC, L803884E0_20F0
-
-dlabel D_80392164
-.float 0.95
-
-dlabel D_80392168
-.float 1.05
-
-dlabel D_8039216C
-.float 5000.0
-
-dlabel D_80392170
-.float 12000.0, 0.95
-
-dlabel D_80392178
-.float 1.05
-
-dlabel D_8039217C
-.float 5000.0
-
-dlabel D_80392180
-.float 12000.0
-
-dlabel D_80392184
-.float 0.4
-
-dlabel D_80392188
-.float 5000.0
-
-dlabel D_8039218C
-.float 12000.0, 2700.0
-
-dlabel D_80392194
-.float 1150.0
-
-dlabel D_80392198
-.float 0.95
-
-dlabel D_8039219C
-.float 1.05
-
-dlabel D_803921A0
-.float 5000.0
-
-dlabel D_803921A4
-.float 12000.0
-
-dlabel D_803921A8
-.float 0.95
-
-dlabel D_803921AC
-.float 1.05
-
-dlabel D_803921B0
-.float 5000.0
-
-dlabel D_803921B4
-.float 12000.0
-
-dlabel jtbl_803921B8
-.word L803887AC_23BC, L803888A8_24B8, L80388964_2574, L803889EC_25FC, L80388B24_2734, L80388DC4_29D4, L80388E84_2A94, L80388F5C_2B6C, L80388FC4_2BD4, L80389054_2C64, L803890C0_2CD0, L80389158_2D68
-
-dlabel D_803921E8
-.double 0.3333333333333333
-
-dlabel D_803921F0
-.double 3300.0, 0.7333333333333334
-
-dlabel D_80392200
-.double 3300.0
-
-dlabel D_80392208
-.double 0.66
-
-dlabel D_80392210
-.double 0.65
-
-dlabel jtbl_80392218
-.word L803893E8_2FF8, L803894CC_30DC, L803894F0_3100, L80389594_31A4, L803895D8_31E8, L80389638_3248, L80389660_3270
-
-dlabel jtbl_80392234
-.word L8038975C_336C, L80389788_3398, L803897B4_33C4, L803897E0_33F0, L8038980C_341C
-
-dlabel D_80392248
-.float 1.54
-
-dlabel jtbl_8039224C
-.word L80389BD8_37E8, L80389CFC_390C, L80389D48_3958, L80389D80_3990, L80389E14_3A24, L80389E3C_3A4C, L80389F40_3B50
-
-dlabel D_80392268
-.word 0x3F99999A, 0x00000000
-
-dlabel D_80392270
-.double 0.1
-
-dlabel D_80392278
-.double 0.8
-
-dlabel jtbl_80392280
-.word L80389FEC_3BFC, L8038A4D4_40E4, L8038A01C_3C2C, L8038A4D4_40E4, L8038A1B4_3DC4, L8038A208_3E18, L8038A3D4_3FE4
-
-dlabel D_8039229C
-.float 2.2
-
-dlabel D_803922A0
-.float 2.2
-
-dlabel D_803922A4
-.float 2.2
-
-dlabel D_803922A8
-.float 4.4
-
-dlabel D_803922AC
-.float 4.4
-
-dlabel D_803922B0
-.float 4.4
-
-dlabel D_803922B4
-.float 6.6
-
-dlabel D_803922B8
-.float 6.6
-
-dlabel D_803922BC
-.float 6.6
-
-dlabel D_803922C0
-.float 8.8
-
-dlabel D_803922C4
-.float 8.8
-
-dlabel D_803922C8
-.float 8.8
-
-dlabel D_803922CC
-.float 0.95
-
-dlabel D_803922D0
-.float 1.05
-
-dlabel D_803922D4
-.float 5000.0
-
-dlabel D_803922D8
-.float 12000.0
-
-dlabel D_803922DC
-.float 0.6
-
-dlabel D_803922E0
-.double 1.7, -1190.0
-
-dlabel D_803922F0
-.float 1.7
-
-dlabel D_803922F4
-.float 1.7
-
-dlabel D_803922F8
-.float 1.7
-
-dlabel D_803922FC
-.float 1.7
-
-dlabel D_80392300
-.float 0.95
-
-dlabel D_80392304
-.float 1.05
-
-dlabel D_80392308
-.float 0.95
-
-dlabel D_8039230C
-.float 1.05
-
-dlabel jtbl_80392310
-.word L8038A778_4388, L8038A7D0_43E0, L8038A818_4428, L8038A8A0_44B0, L8038A8FC_450C, L8038A924_4534, L8038AA3C_464C
-
-dlabel D_8039232C
-.float 0.95
-
-dlabel D_80392330
-.float 1.05
-
-dlabel D_80392334
-.float 0.95
-
-dlabel D_80392338
-.float 1.05
-
-dlabel D_8039233C
-.float 0.95
-
-dlabel D_80392340
-.float 1.05
-
-dlabel D_80392344
-.float 0.95
-
-dlabel D_80392348
-.float 1.05
-
-dlabel D_8039234C
-.float 0.95
-
-dlabel D_80392350
-.float 1.05
-
-dlabel D_80392354
-.float 0.95
-
-dlabel D_80392358
-.float 1.05, 0.0
-
-dlabel D_80392360
-.double 0.4
-
-dlabel D_80392368
-.double 0.65
-
-dlabel D_80392370
-.double 0.005
-
-dlabel D_80392378
-.double 1.99
-
-dlabel D_80392380
-.float 0.95
-
-dlabel D_80392384
-.float 1.05
-
-dlabel jtbl_80392388
-.word L8038ACE8_48F8, L8038AD90_49A0, L8038ADA0_49B0, L8038AF14_4B24, L8038AF70_4B80, L8038ADA8_49B8, L8038AE00_4A10, L8038AE5C_4A6C, L8038AF28_4B38
-
-dlabel D_803923AC
-.float 0.95
-
-dlabel D_803923B0
-.float 1.05
-
-dlabel D_803923B4
-.float 5000.0
-
-dlabel D_803923B8
-.float 12000.0, 0.95
-
-dlabel D_803923C0
-.float 1.05
-
-dlabel D_803923C4
-.float 5000.0
-
-dlabel D_803923C8
-.float 12000.0
-
-dlabel D_803923CC
-.float 0.95
-
-dlabel D_803923D0
-.float 1.05
-
-dlabel D_803923D4
-.float 5000.0
-
-dlabel D_803923D8
-.float 12000.0
-
-dlabel D_803923DC
-.float 0.6
-
-dlabel D_803923E0
-.float 0.6, 2.4
-
-dlabel D_803923E8
-.float 2.4
-
-dlabel D_803923EC
-.float 4.4
-
-dlabel D_803923F0
-.float 4.4
-
-dlabel jtbl_803923F4
-.word L8038B290_4EA0, L8038B2A4_4EB4, L8038B2DC_4EEC, L8038B368_4F78, L8038B3B4_4FC4, L8038B460_5070, L8038B4FC_510C, L8038B564_5174, L8038B58C_519C
-
-dlabel D_80392418
-.double 0.56
-
-dlabel D_80392420
-.double 0.99
-
-dlabel D_80392428
-.float 4.8
-
-dlabel jtbl_8039242C
-.word L8038B874_5484, L8038B8D0_54E0, L8038B91C_552C, L8038B93C_554C, L8038B95C_556C
-
-dlabel D_80392440
-.float 0.95
-
-dlabel D_80392444
-.float 1.05
-
-dlabel D_80392448
-.float 5000.0
-
-dlabel D_8039244C
-.float 12000.0
-
-dlabel D_80392450
-.float 0.6
-
-dlabel jtbl_80392454
-.word L8038BF30_5B40, L8038BF40_5B50, L8038BF50_5B60, L8038BF60_5B70, L8038BF70_5B80, L8038BF80_5B90, 0
-
-dlabel D_80392470
-.double 0.08
-
-dlabel D_80392478
-.float 2.88, 0.0
-
-dlabel D_80392480
-.double 0.35
-
-dlabel D_80392488
-.double 0.65
-
-dlabel D_80392490
-.float 0.3, 0.0
-
-dlabel D_80392498
-.double 45.0
-
-dlabel D_803924A0
-.double 0.3
-
-dlabel D_803924A8
-.double 2.26
-
-dlabel D_803924B0
-.double 182.04444
-
-dlabel jtbl_803924B8
-.word L8038C92C_653C, L8038C980_6590, L8038CA48_6658, L8038CA48_6658, L8038CE68_6A78
-
-dlabel D_803924CC
-.float 0.95
-
-dlabel D_803924D0
-.float 1.05
-
-dlabel D_803924D4
-.float 5000.0
-
-dlabel D_803924D8
-.float 0.95
-
-dlabel D_803924DC
-.float 1.05
-
-dlabel D_803924E0
-.float 5000.0
-
-dlabel D_803924E4
-.float 12000.0
-
-dlabel D_803924E8
-.double 0.1
-
-dlabel D_803924F0
-.double 0.8
-
-dlabel D_803924F8
-.double 0.2
-
-dlabel D_80392500
-.float 0.1
-
-dlabel D_80392504
-.float 5000.0
-
-dlabel D_80392508
-.float 12000.0
-
-dlabel D_8039250C
-.float 2500.0
-
-dlabel D_80392510
-.double 0.98
-
-dlabel D_80392518
-.float 1.15
-
-dlabel D_8039251C
-.float 0.1
-
-dlabel D_80392520
-.float 2.26, 0.0, 0.0, 0.0
diff --git a/asm/ultra/exceptasm.s b/asm/ultra/exceptasm.s
index 307ba0fa..ac13e866 100644
--- a/asm/ultra/exceptasm.s
+++ b/asm/ultra/exceptasm.s
@@ -1,4 +1,5 @@
#include
+#include
.include "macro.inc"
# assembler directives
@@ -146,8 +147,8 @@ glabel __osException
/* 2F90 80002390 0369D825 */ or $k1, $k1, $t1
/* 2F94 80002394 AF5B0118 */ sw $k1, 0x118($k0)
.L80002398:
-/* 2F98 80002398 3C09A430 */ lui $t1, %hi(D_A430000C)
-/* 2F9C 8000239C 8D29000C */ lw $t1, %lo(D_A430000C)($t1)
+/* 2F98 80002398 3C09A430 */ lui $t1, %hi(PHYS_TO_K1(MI_INTR_MASK_REG))
+/* 2F9C 8000239C 8D29000C */ lw $t1, %lo(PHYS_TO_K1(MI_INTR_MASK_REG))($t1)
/* 2FA0 800023A0 5120000C */ beql $t1, $zero, .L800023D4
/* 2FA4 800023A4 AF490128 */ sw $t1, 0x128($k0)
/* 2FA8 800023A8 3C088000 */ lui $t0, %hi(__OSGlobalIntMask)
@@ -262,21 +263,21 @@ rcp:
/* 3134 80002534 3C088000 */ lui $t0, %hi(__OSGlobalIntMask)
/* 3138 80002538 250850F0 */ addiu $t0, $t0, %lo(__OSGlobalIntMask)
/* 313C 8000253C 8D080000 */ lw $t0, ($t0)
-/* 3140 80002540 3C11A430 */ lui $s1, %hi(D_A4300008)
-/* 3144 80002544 8E310008 */ lw $s1, %lo(D_A4300008)($s1)
+/* 3140 80002540 3C11A430 */ lui $s1, %hi(PHYS_TO_K1(MI_INTR_REG))
+/* 3144 80002544 8E310008 */ lw $s1, %lo(PHYS_TO_K1(MI_INTR_REG))($s1)
/* 3148 80002548 00084402 */ srl $t0, $t0, 0x10
/* 314C 8000254C 02288824 */ and $s1, $s1, $t0
/* 3150 80002550 32290001 */ andi $t1, $s1, 1
/* 3154 80002554 51200014 */ beql $t1, $zero, .L800025A8
/* 3158 80002558 32290008 */ andi $t1, $s1, 8
-/* 315C 8000255C 3C0CA404 */ lui $t4, %hi(D_A4040010)
-/* 3160 80002560 8D8C0010 */ lw $t4, %lo(D_A4040010)($t4)
+/* 315C 8000255C 3C0CA404 */ lui $t4, %hi(PHYS_TO_K1(SP_STATUS_REG))
+/* 3160 80002560 8D8C0010 */ lw $t4, %lo(PHYS_TO_K1(SP_STATUS_REG))($t4)
/* 3164 80002564 24090008 */ addiu $t1, $zero, 8
-/* 3168 80002568 3C01A404 */ lui $at, %hi(D_A4040010)
+/* 3168 80002568 3C01A404 */ lui $at, %hi(PHYS_TO_K1(SP_STATUS_REG))
/* 316C 8000256C 318C0300 */ andi $t4, $t4, 0x300
/* 3170 80002570 3231003E */ andi $s1, $s1, 0x3e
/* 3174 80002574 11800007 */ beqz $t4, .L80002594
-/* 3178 80002578 AC290010 */ sw $t1, %lo(D_A4040010)($at)
+/* 3178 80002578 AC290010 */ sw $t1, %lo(PHYS_TO_K1(SP_STATUS_REG))($at)
/* 317C 8000257C 0C0009E9 */ jal send_mesg
/* 3180 80002580 24040020 */ addiu $a0, $zero, 0x20
/* 3184 80002584 52200039 */ beql $s1, $zero, .L8000266C
@@ -291,9 +292,9 @@ rcp:
/* 31A4 800025A4 32290008 */ andi $t1, $s1, 8
.L800025A8:
/* 31A8 800025A8 11200007 */ beqz $t1, .L800025C8
-/* 31AC 800025AC 3C01A440 */ lui $at, %hi(D_A4400010)
+/* 31AC 800025AC 3C01A440 */ lui $at, %hi(PHYS_TO_K1(VI_CURRENT_REG))
/* 31B0 800025B0 32310037 */ andi $s1, $s1, 0x37
-/* 31B4 800025B4 AC200010 */ sw $zero, %lo(D_A4400010)($at)
+/* 31B4 800025B4 AC200010 */ sw $zero, %lo(PHYS_TO_K1(VI_CURRENT_REG))($at)
/* 31B8 800025B8 0C0009E9 */ jal send_mesg
/* 31BC 800025BC 24040038 */ addiu $a0, $zero, 0x38
/* 31C0 800025C0 5220002A */ beql $s1, $zero, .L8000266C
@@ -303,9 +304,9 @@ rcp:
/* 31CC 800025CC 5120000A */ beql $t1, $zero, .L800025F8
/* 31D0 800025D0 32290002 */ andi $t1, $s1, 2
/* 31D4 800025D4 24090001 */ addiu $t1, $zero, 1
-/* 31D8 800025D8 3C01A450 */ lui $at, %hi(D_A450000C)
+/* 31D8 800025D8 3C01A450 */ lui $at, %hi(PHYS_TO_K1(AI_STATUS_REG))
/* 31DC 800025DC 3231003B */ andi $s1, $s1, 0x3b
-/* 31E0 800025E0 AC29000C */ sw $t1, %lo(D_A450000C)($at)
+/* 31E0 800025E0 AC29000C */ sw $t1, %lo(PHYS_TO_K1(AI_STATUS_REG))($at)
/* 31E4 800025E4 0C0009E9 */ jal send_mesg
/* 31E8 800025E8 24040030 */ addiu $a0, $zero, 0x30
/* 31EC 800025EC 5220001F */ beql $s1, $zero, .L8000266C
@@ -313,9 +314,9 @@ rcp:
/* 31F4 800025F4 32290002 */ andi $t1, $s1, 2
.L800025F8:
/* 31F8 800025F8 11200007 */ beqz $t1, .L80002618
-/* 31FC 800025FC 3C01A480 */ lui $at, %hi(D_A4800018)
+/* 31FC 800025FC 3C01A480 */ lui $at, %hi(PHYS_TO_K1(SI_STATUS_REG))
/* 3200 80002600 3231003D */ andi $s1, $s1, 0x3d
-/* 3204 80002604 AC200018 */ sw $zero, %lo(D_A4800018)($at)
+/* 3204 80002604 AC200018 */ sw $zero, %lo(PHYS_TO_K1(SI_STATUS_REG))($at)
/* 3208 80002608 0C0009E9 */ jal send_mesg
/* 320C 8000260C 24040028 */ addiu $a0, $zero, 0x28
/* 3210 80002610 52200016 */ beql $s1, $zero, .L8000266C
@@ -325,9 +326,9 @@ rcp:
/* 321C 8000261C 5120000A */ beql $t1, $zero, .L80002648
/* 3220 80002620 32290020 */ andi $t1, $s1, 0x20
/* 3224 80002624 24090002 */ addiu $t1, $zero, 2
-/* 3228 80002628 3C01A460 */ lui $at, %hi(D_A4600010)
+/* 3228 80002628 3C01A460 */ lui $at, %hi(PHYS_TO_K1(PI_STATUS_REG))
/* 322C 8000262C 3231002F */ andi $s1, $s1, 0x2f
-/* 3230 80002630 AC290010 */ sw $t1, %lo(D_A4600010)($at)
+/* 3230 80002630 AC290010 */ sw $t1, %lo(PHYS_TO_K1(PI_STATUS_REG))($at)
/* 3234 80002634 0C0009E9 */ jal send_mesg
/* 3238 80002638 24040040 */ addiu $a0, $zero, 0x40
/* 323C 8000263C 5220000B */ beql $s1, $zero, .L8000266C
@@ -545,9 +546,9 @@ glabel __osEnqueueAndYield
/* 3530 80002930 0361D824 */ and $k1, $k1, $at
/* 3534 80002934 0369D825 */ or $k1, $k1, $t1
/* 3538 80002938 ACBB0118 */ sw $k1, 0x118($a1)
-/* 353C 8000293C 3C1BA430 */ lui $k1, %hi(D_A430000C)
+/* 353C 8000293C 3C1BA430 */ lui $k1, %hi(PHYS_TO_K1(MI_INTR_MASK_REG))
.L80002940:
-/* 3540 80002940 8F7B000C */ lw $k1, %lo(D_A430000C)($k1)
+/* 3540 80002940 8F7B000C */ lw $k1, %lo(PHYS_TO_K1(MI_INTR_MASK_REG))($k1)
/* 3544 80002944 1360000B */ beqz $k1, .L80002974
/* 3548 80002948 00000000 */ nop
/* 354C 8000294C 3C1A8000 */ lui $k0, %hi(__OSGlobalIntMask)
@@ -689,8 +690,8 @@ glabel __osDispatchThread
/* 3734 80002B34 275A51D0 */ addiu $k0, $k0, %lo(__osRcpImTable)
/* 3738 80002B38 037AD821 */ addu $k1, $k1, $k0
/* 373C 80002B3C 977B0000 */ lhu $k1, ($k1)
-/* 3740 80002B40 3C1AA430 */ lui $k0, %hi(D_A430000C)
-/* 3744 80002B44 275A000C */ addiu $k0, $k0, %lo(D_A430000C)
+/* 3740 80002B40 3C1AA430 */ lui $k0, %hi(PHYS_TO_K1(MI_INTR_MASK_REG))
+/* 3744 80002B44 275A000C */ addiu $k0, $k0, %lo(PHYS_TO_K1(MI_INTR_MASK_REG))
/* 3748 80002B48 AF5B0000 */ sw $k1, ($k0)
/* 374C 80002B4C 00000000 */ nop
/* 3750 80002B50 00000000 */ nop
diff --git a/asm/ultra/parameters.s b/asm/ultra/parameters.s
new file mode 100644
index 00000000..450af31b
--- /dev/null
+++ b/asm/ultra/parameters.s
@@ -0,0 +1,17 @@
+#include "PR/R4300.h"
+#include "sys/asm.h"
+#include "sys/regdef.h"
+
+.text
+ABS(leoBootID, 0x800001a0)
+ABS(osTvType, 0x80000300)
+ABS(osRomType, 0x80000304)
+ABS(osRomBase, 0x80000308)
+ABS(osResetType, 0x8000030c)
+ABS(osCicId, 0x80000310)
+ABS(osVersion, 0x80000314)
+ABS(osMemSize, 0x80000318)
+ABS(osAppNMIBuffer, 0x8000031c)
+
+.space 0x60
+/* padded to 0x60 in the object file */
diff --git a/asm/ultra/setintmask.s b/asm/ultra/setintmask.s
index 5af09ba5..c5c891d8 100644
--- a/asm/ultra/setintmask.s
+++ b/asm/ultra/setintmask.s
@@ -1,4 +1,5 @@
#include
+#include
.include "macro.inc"
# assembler directives
.set noat # allow manual use of $at
@@ -100,8 +101,8 @@ glabel func_80003A30
/* 4648 80003A48 01614026 */ xor $t0, $t3, $at
/* 464C 80003A4C 3108FF00 */ andi $t0, $t0, 0xff00
/* 4650 80003A50 00481025 */ or $v0, $v0, $t0
-/* 4654 80003A54 3C0AA430 */ lui $t2, %hi(D_A430000C)
-/* 4658 80003A58 8D4A000C */ lw $t2, %lo(D_A430000C)($t2)
+/* 4654 80003A54 3C0AA430 */ lui $t2, %hi(PHYS_TO_K1(MI_INTR_MASK_REG))
+/* 4658 80003A58 8D4A000C */ lw $t2, %lo(PHYS_TO_K1(MI_INTR_MASK_REG))($t2)
/* 465C 80003A5C 11400005 */ beqz $t2, .L80003A74
/* 4660 80003A60 000B4C02 */ srl $t1, $t3, 0x10
/* 4664 80003A64 2401FFFF */ addiu $at, $zero, -1
@@ -118,8 +119,8 @@ glabel func_80003A30
/* 468C 80003A8C 3C0A8000 */ lui $t2, %hi(__osRcpImTable)
/* 4690 80003A90 01485021 */ addu $t2, $t2, $t0
/* 4694 80003A94 954A51D0 */ lhu $t2, %lo(__osRcpImTable)($t2)
-/* 4698 80003A98 3C01A430 */ lui $at, %hi(D_A430000C)
-/* 469C 80003A9C AC2A000C */ sw $t2, %lo(D_A430000C)($at)
+/* 4698 80003A98 3C01A430 */ lui $at, %hi(PHYS_TO_K1(MI_INTR_MASK_REG))
+/* 469C 80003A9C AC2A000C */ sw $t2, %lo(PHYS_TO_K1(MI_INTR_MASK_REG))($at)
/* 46A0 80003AA0 3088FF01 */ andi $t0, $a0, 0xff01
/* 46A4 80003AA4 3169FF00 */ andi $t1, $t3, 0xff00
/* 46A8 80003AA8 01094024 */ and $t0, $t0, $t1
diff --git a/decompressed.us.v10.yaml b/decompressed.us.v10.yaml
index fa7e0ea9..f848f3b9 100644
--- a/decompressed.us.v10.yaml
+++ b/decompressed.us.v10.yaml
@@ -15,12 +15,14 @@ options:
#include "variables.h"
undefined_syms_path: undefined_syms.us.v10.txt
symbol_addrs_path: symbol_addrs.us.v10.txt
- undefined_funcs_auto_path: undefined_funcs_auto.us.v10.txt
- undefined_syms_auto_path: undefined_syms_auto.us.v10.txt
+ create_undefined_funcs_auto: no
+ create_undefined_syms_auto: no
base_path: .
target_path: decompressed.us.v10.z64
asset_path: bin
build_path: build/us.v10
+ libultra_symbols: True
+ hardware_regs: True
segments:
- name: header
type: header
@@ -63,7 +65,7 @@ segments:
- [0x3870, hasm, maptlbrdb]
- [0x38D0, c, done/pirawread]
- [0x3930, c, done/ll]
- - [0x3BF0, bin, padding3BF0] # Empty space
+ - [0x3BF0, hasm, ultra/parameters]
- [0x3C50, c, done/virtualtophysical]
- [0x3CD0, c, done/si]
- [0x3D00, c, done/thread]
@@ -123,18 +125,20 @@ segments:
start: 0x5E90
subsegments:
- [0x5E90, bin, assets]
-- name: soundfont1
+- name: soundfont1ctl
type: bin
start: 0xD846C0
- subsegments:
- - [0xD846C0, bin, soundfont1.ctl]
- - [0xD954B0, bin, soundfont1.tbl]
-- name: soundfont2
+- name: soundfont1tbl
+ type: bin
+ start: 0xD954B0
+
+- name: soundfont2ctl
type: bin
start: 0xEA3EB0
- subsegments:
- - [0xEA3EB0, bin, soundfont2.ctl]
- - [0xEADE60, bin, soundfont2.tbl]
+- name: soundfont2tbl
+ type: bin
+ start: 0xEADE60
+
- name: core1
dir: core1
type: code
@@ -233,7 +237,7 @@ segments:
- [0xF3F820, c, gu/sinf] #DONE
- [0xF3F9E0, c, audio/cents2ratio] #DONE
- [0xF3FA30, c, audio/heapinit] #DONE
- - [0xF3FA70, asm, padding] # 0x60 bytes of zeroes?
+ - [0xF3FA70, hasm, ultra/parameters] #DONE
- [0xF3FAD0, c, os/createmesgqueue] #DONE
- [0xF3FB00, c, io/aisetfreq] #DONE
- [0xF3FC60, c, audio/sl] #DONE
@@ -1496,6 +1500,7 @@ segments:
- [0x1048560, .bss, code_41FB0]
- [0x1048560, .bss, code_42CB0]
- [0x1048560, .bss, mapspecificflags]
+ - [0x1048560, .bss, code_47BD0]
- [0x1048560, .bss, code_4A6F0]
- [0x1048560, .bss, code_4C020]
- [0x1048560, .bss, ch/badShad]
@@ -1614,6 +1619,7 @@ segments:
- [0x1048560, .bss, code_C5440]
- [0x1048560, .bss, code_C89C0]
- [0x1048560, .bss, code_C97F0]
+ - [0x1048560, .bss, code_C9E70]
- [0x1048560, .bss, code_C9F00]
- [0x1048560, .bss, code_CB8A0]
- [0x1048560, .bss, code_CBBF0]
@@ -1882,7 +1888,7 @@ segments:
- [0x1068340, .rodata, ch/grublin]
- [0x1068350, .rodata, ch/jujuhitbox]
- [0x1068360, .rodata, ch/juju]
- - [0x1068370, .bss, bss_pad]
+ - [0x1068370, .bss, ch/hut]
- [0x1068370, .bss, ch/juju]
- name: BGS
dir: BGS
@@ -2112,7 +2118,8 @@ segments:
- [0x108AB50, .bss, sirslushgame]
- [0x108AB50, .bss, snowmanbuttongame]
- [0x108AB50, .bss, racectrl]
- - [0x108AB50, .bss, bss_end_pad]
+ - [0x108AB50, .bss, ch/xmastreestar]
+ - [0x108AB50, .bss, code_B4D0]
- name: SM
dir: SM
type: code
diff --git a/first_diff.py b/first_diff.py
index a2546fc1..3bffd788 100755
--- a/first_diff.py
+++ b/first_diff.py
@@ -184,7 +184,7 @@ def hexbytes(bs):
found_instr_diff = []
map_search_diff = []
diffs = 0
-shift_cap = 1000
+shift_cap = 100000
for i in range(24, len(mybin), 4):
# (mybin[i:i+4] != basebin[i:i+4], but that's slightly slower in CPython...)
if diffs <= shift_cap and (
diff --git a/include/assets.h b/include/assets.h
index a762c0e1..6dde267f 100644
--- a/include/assets.h
+++ b/include/assets.h
@@ -16,6 +16,6 @@ typedef struct asset_file_meta_s{
} AssetFileMeta;
-extern u8 D_5E90; //rom file asset bin;
+extern u8 assets_ROM_START[]; //rom file asset bin;
#endif
diff --git a/include/core2/code_C9E70.h b/include/core2/code_C9E70.h
index 480ac104..bd6793e1 100644
--- a/include/core2/code_C9E70.h
+++ b/include/core2/code_C9E70.h
@@ -42,8 +42,6 @@ struct FF_StorageStruct_48 {
struct FF_StorageStruct_48_sub data[4];
}; // 0x90
-
-
// FF: generic storage struct
struct FF_StorageStruct {
/* 00 */ BKModel *unk0;
diff --git a/undefined_syms.us.v10.txt b/manual_syms.txt
similarity index 59%
rename from undefined_syms.us.v10.txt
rename to manual_syms.txt
index 38d9bf15..4cc3d756 100644
--- a/undefined_syms.us.v10.txt
+++ b/manual_syms.txt
@@ -1,25 +1,4 @@
-/* lair */
-FF_QuestionTypeInfoArr = 0x80394340;
-D_80392EB0 = 0x80392EB0;
-D_80392E20 = 0x80392E20;
-lair_D_80392D90 = 0x80392D90;
-MMM_D_8038C510 = 0x8038C510;
-func_803863F0 = 0x803863F0;
-D_8038D6A0 = 0x8038D6A0;
-D_8038D378 = 0x8038D378;
-D_8038D4DC = 0x8038D4DC;
-D_8038D534 = 0x8038D534;
-D_8038D590 = 0x8038D590;
-D_8038D6DC = 0x8038D6DC;
-D_8038D844 = 0x8038D844;
-fight_D_80391A10 = 0x80391A10;
-FP_D_80392840 = 0x80392840;
-core1_D_803727F4 = 0x803727F4;
-__osBaseTimer = 0x80285D00;
-FP_D_80392864 = 0x80392864;
-D_803687F0 = 0x803687F0;
-D_80276E70 = 0x80276E70;
-
+/* Microcode renames to match ucode.h names */
n_aspMainTextStart = _binary_bin_core1_n_aspMain_text_bin_start;
n_aspMainTextEnd = _binary_bin_core1_n_aspMain_text_bin_end;
gSPF3DEX_fifoTextStart = _binary_bin_core1_gSPF3DEX_fifo_text_bin_start;
@@ -32,3 +11,21 @@ gSPF3DEX_fifoDataStart = _binary_bin_core1_gSPF3DEX_fifo_data_bin_start;
gSPF3DEX_fifoDataEnd = _binary_bin_core1_gSPF3DEX_fifo_data_bin_end;
gSPL3DEX_fifoDataStart = _binary_bin_core1_gSPL3DEX_fifo_data_bin_start;
gSPL3DEX_fifoDataEnd = _binary_bin_core1_gSPL3DEX_fifo_data_bin_end;
+
+/* Fixed-address buffers */
+D_8000E800 = 0x8000E800;
+D_8002D500 = 0x8002D500;
+D_8023DA00 = 0x8023DA00; /* confirm */
+D_803FBE00 = 0x803FBE00;
+D_803FFE00 = 0x803FFE00;
+D_803FFE10 = 0x803FFE10;
+gOverlayTable = 0x803FFE10;
+D_803A5D00 = 0x803A5D00; /* framebuffers */
+
+/* Renames for the boot segment */
+boot_D_8002D500 = D_8002D500;
+boot_core1_VRAM = core1_VRAM;
+boot_D_803FBE00 = D_803FBE00;
+boot_D_803FFE00 = D_803FFE00;
+boot_gOverlayTable = gOverlayTable;
+boot_func_8023DA20 = func_8023DA20;
diff --git a/progress/progress_core2.svg b/progress/progress_core2.svg
index efcb53a1..43d21f64 100644
--- a/progress/progress_core2.svg
+++ b/progress/progress_core2.svg
@@ -1,23 +1,23 @@
-